Test Bank for Assembly Language for x86 Processors, 8th Edition

Chapter 2 (x86 Processor Architecture) – Assessment To view the answers in Word 2010, select File | Options | Display, and select the Hidden Text checkbox. True-False Please indicate whether each statement is True (T) or False (F). 1. The control unit (CU) coordinates the sequencing of steps involved in executing machine instructions. 2. The arithmetic logic unit performs addition, subtraction, multiplication, and division operations. 3. Data travels along a bus with n bits running in parallel, where the bus is n bits wide. 4. Another name for machine cycle is clock cycle. 5. The upper half of the RDX register is called EDX. 6. The lower half of the RCX register is called EBX. 7. The Carry flag reflects the status of an usigned arithmetic operation. 8. The Zero flag is clear when the result of an arithmetic operation is zero. 9. The MMX register names are just different names for registers in the floating-point unit. 10. Requests from hardware devices are called interrrupts. 11. In Real-address mode, multiple programs can run at the same time, but they can only address physical memory. 12. When running in 64-bit mode, only the lowest 48 bits of address operands are used. 13. In 64-bit mode, you can use three more general-purpose registers than in 32-bit mode. 14. When running in native 64-bit mode, processors do not support 16-bit Real Mode. 15. The Basic Input-Output System is a collection of low-level subroutines that communicate directly with hardware devices. Irvine, Kip R. Assembly Language for x86 Processors, 8th Edition 1